summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
diff options
context:
space:
mode:
authorTom St Denis <tom.stdenis@amd.com>2017-02-09 14:29:01 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-03-29 23:52:59 -0400
commit9f8df7d71e382c9afa808a08c11a990e90ac7df4 (patch)
tree9002abe9daf71a55c7bcde6022f4ed6b67d657e6 /drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
parent603adfe83a568d50542c9e7b9829d7baa497f0de (diff)
drm/amd/amdgpu: Update read_sensor calls to have size parameter (v3)
This update allows sensors to return more than 1 value and indicates to the caller how many bytes are written. The debugfs interface has been updated to handle reading all of the values. Simply seek to the enum value (multiplied by 4) and then read as many bytes as the sensor provides. (v2): Don't set size to 4 before reading GPU_POWER (v3): agd: rebase Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 5a4ee43b3d65..13b35be3174c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -3320,22 +3320,29 @@ static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr,
return 0;
}
-static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value)
+static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx,
+ void *value, int *size)
{
uint32_t sclk, mclk, activity_percent;
uint32_t offset;
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
+ /* size must be at least 4 bytes for all sensors */
+ if (*size < 4)
+ return -EINVAL;
+
switch (idx) {
case AMDGPU_PP_SENSOR_GFX_SCLK:
smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_API_GetSclkFrequency);
sclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);
*((uint32_t *)value) = sclk;
+ *size = 4;
return 0;
case AMDGPU_PP_SENSOR_GFX_MCLK:
smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_API_GetMclkFrequency);
mclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);
*((uint32_t *)value) = mclk;
+ *size = 4;
return 0;
case AMDGPU_PP_SENSOR_GPU_LOAD:
offset = data->soft_regs_start + smum_get_offsetof(hwmgr->smumgr,
@@ -3346,17 +3353,24 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value)
activity_percent += 0x80;
activity_percent >>= 8;
*((uint32_t *)value) = activity_percent > 100 ? 100 : activity_percent;
+ *size = 4;
return 0;
case AMDGPU_PP_SENSOR_GPU_TEMP:
*((uint32_t *)value) = smu7_thermal_get_temperature(hwmgr);
+ *size = 4;
return 0;
case AMDGPU_PP_SENSOR_UVD_POWER:
*((uint32_t *)value) = data->uvd_power_gated ? 0 : 1;
+ *size = 4;
return 0;
case AMDGPU_PP_SENSOR_VCE_POWER:
*((uint32_t *)value) = data->vce_power_gated ? 0 : 1;
+ *size = 4;
return 0;
case AMDGPU_PP_SENSOR_GPU_POWER:
+ if (*size < sizeof(struct pp_gpu_power))
+ return -EINVAL;
+ *size = sizeof(struct pp_gpu_power);
return smu7_get_gpu_power(hwmgr, (struct pp_gpu_power *)value);
default:
return -EINVAL;