summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
diff options
context:
space:
mode:
authorRex Zhu <Rex.Zhu@amd.com>2018-01-12 17:05:37 +0800
committerAlex Deucher <alexander.deucher@amd.com>2018-02-19 14:17:54 -0500
commitee85c07abe0f9899c4d18796bc2d6b90aa7ad4af (patch)
tree37357ce5219cb857be12e69054983d30f19b24b6 /drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
parent5ed8d656d60fd19d14bed647793eff0913627fd7 (diff)
drm/amd/pp: Refine code abbreviate variable name
abbreviate variable name number_of_performance_levels to num_of_pl in struct phm_odn_clock_levels Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 8af728422df3..fdb8d3457ed1 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -1386,8 +1386,8 @@ static int vega10_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
if (PP_CAP(PHM_PlatformCaps_ODNinACSupport) ||
PP_CAP(PHM_PlatformCaps_ODNinDCSupport)) {
- data->odn_dpm_table.odn_core_clock_dpm_levels.
- number_of_performance_levels = data->dpm_table.gfx_table.count;
+ data->odn_dpm_table.odn_core_clock_dpm_levels.num_of_pl =
+ data->dpm_table.gfx_table.count;
for (i = 0; i < data->dpm_table.gfx_table.count; i++) {
data->odn_dpm_table.odn_core_clock_dpm_levels.entries[i].clock =
data->dpm_table.gfx_table.dpm_levels[i].value;
@@ -1407,8 +1407,8 @@ static int vega10_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
dep_gfx_table->entries[i].cks_voffset;
}
- data->odn_dpm_table.odn_memory_clock_dpm_levels.
- number_of_performance_levels = data->dpm_table.mem_table.count;
+ data->odn_dpm_table.odn_memory_clock_dpm_levels.num_of_pl =
+ data->dpm_table.mem_table.count;
for (i = 0; i < data->dpm_table.mem_table.count; i++) {
data->odn_dpm_table.odn_memory_clock_dpm_levels.entries[i].clock =
data->dpm_table.mem_table.dpm_levels[i].value;