diff options
| author | Matt Coffin <mcoffin13@gmail.com> | 2019-11-08 14:28:06 -0700 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-11-11 17:38:14 -0500 |
| commit | 21677d0880957a81910d83f042e788b684472d1e (patch) | |
| tree | 8adeac273729463f1ccff4de226f7012eaee2179 /drivers/gpu/drm/amd/powerplay/inc | |
| parent | 9f87516764a9f2a6a6a9552844efb41d9748afec (diff) | |
drm/amdgpu/navi10: implement sclk/mclk OD via pp_od_clk_voltage
[Why]
Before this patch, there was no way to use pp_od_clk_voltage on navi
[How]
Similar to the vega20 implementation, but using the common smc_v11_0
headers, implemented the pp_od_clk_voltage API for navi10's pptable
implementation
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Matt Coffin <mcoffin13@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/inc')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h index fd6ec9033d06..154b57a4dbbb 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h @@ -250,4 +250,6 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_ int smu_v11_0_override_pcie_parameters(struct smu_context *smu); +int smu_v11_0_set_default_od_settings(struct smu_context *smu, bool initialize, size_t overdrive_table_size); + #endif |