diff options
| author | Evan Quan <evan.quan@amd.com> | 2020-06-09 16:16:56 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-10 17:42:29 -0400 |
| commit | e5ef784b1e1736ae1e90872217b95f4529dfa422 (patch) | |
| tree | 05ead2eac31d1314a3d2f10bc4ab1ae99b98187d /drivers/gpu/drm/amd/powerplay/smu_v12_0.c | |
| parent | c98f31d17cc8a4e9484c75c24efdb50c700daf00 (diff) | |
drm/amd/powerplay: revise calling chain on retrieving frequency range
This helps to maintain clear code layers and drop unnecessary
parameter.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smu_v12_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/smu_v12_0.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c index e46fc6178235..6400a0acad63 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c @@ -321,6 +321,34 @@ int smu_v12_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c { int ret = 0; uint32_t mclk_mask, soc_mask; + uint32_t clock_limit; + + if (!smu_clk_dpm_is_enabled(smu, clk_type)) { + switch (clk_type) { + case SMU_MCLK: + case SMU_UCLK: + clock_limit = smu->smu_table.boot_values.uclk; + break; + case SMU_GFXCLK: + case SMU_SCLK: + clock_limit = smu->smu_table.boot_values.gfxclk; + break; + case SMU_SOCCLK: + clock_limit = smu->smu_table.boot_values.socclk; + break; + default: + clock_limit = 0; + break; + } + + /* clock in Mhz unit */ + if (min) + *min = clock_limit / 100; + if (max) + *max = clock_limit / 100; + + return 0; + } if (max) { ret = smu_get_profiling_clk_mask(smu, AMD_DPM_FORCED_LEVEL_PROFILE_PEAK, |