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authorRex Zhu <Rex.Zhu@amd.com>2018-01-23 17:12:29 +0800
committerAlex Deucher <alexander.deucher@amd.com>2018-02-19 14:18:47 -0500
commitc7429b3ae97fe3fdbbc8fb61ab0a032a558bba9e (patch)
treeea84fccabd3bc0ab47f59084bdb7d71a6db45009 /drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
parent527d9427fa21814988bec378f9a8b2c2d441fcc1 (diff)
drm/amd/pp: Add struct profile_mode_setting for smu7
Move configurable profiling parameters to struct profile_mode_setting and initialize current_profile_setting. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c')
-rw-r--r--drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
index f9856e1c89ff..d2f8e34e0a4e 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
@@ -968,8 +968,8 @@ static int polaris10_populate_single_graphic_level(struct pp_hwmgr *hwmgr,
level->CcPwrDynRm1 = 0;
level->EnabledForActivity = 0;
level->EnabledForThrottle = 1;
- level->UpHyst = 10;
- level->DownHyst = 0;
+ level->UpHyst = data->current_profile_setting.sclk_up_hyst;
+ level->DownHyst = data->current_profile_setting.sclk_down_hyst;
level->VoltageDownHyst = 0;
level->PowerThrottle = 0;
data->display_timing.min_clock_in_sr = hwmgr->display_config.min_core_set_clock_in_sr;
@@ -1033,7 +1033,7 @@ static int polaris10_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
result = polaris10_populate_single_graphic_level(hwmgr,
dpm_table->sclk_table.dpm_levels[i].value,
- hw_data->sclk_activity_target,
+ hw_data->current_profile_setting.sclk_activity,
&(smu_data->smc_state_table.GraphicsLevel[i]));
if (result)
return result;
@@ -1130,10 +1130,10 @@ static int polaris10_populate_single_memory_level(struct pp_hwmgr *hwmgr,
mem_level->MclkFrequency = clock;
mem_level->EnabledForThrottle = 1;
mem_level->EnabledForActivity = 0;
- mem_level->UpHyst = 0;
- mem_level->DownHyst = 100;
+ mem_level->UpHyst = data->current_profile_setting.mclk_up_hyst;
+ mem_level->DownHyst = data->current_profile_setting.mclk_down_hyst;
mem_level->VoltageDownHyst = 0;
- mem_level->ActivityLevel = data->mclk_activity_target;
+ mem_level->ActivityLevel = data->current_profile_setting.mclk_activity;
mem_level->StutterEnable = false;
mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
@@ -1314,7 +1314,7 @@ static int polaris10_populate_smc_acpi_level(struct pp_hwmgr *hwmgr,
table->MemoryACPILevel.DownHyst = 100;
table->MemoryACPILevel.VoltageDownHyst = 0;
table->MemoryACPILevel.ActivityLevel =
- PP_HOST_TO_SMC_US(data->mclk_activity_target);
+ PP_HOST_TO_SMC_US(data->current_profile_setting.mclk_activity);
CONVERT_FROM_HOST_TO_SMC_UL(table->MemoryACPILevel.MclkFrequency);
CONVERT_FROM_HOST_TO_SMC_UL(table->MemoryACPILevel.MinVoltage);