diff options
| author | Rex Zhu <Rex.Zhu@amd.com> | 2018-09-26 12:17:52 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-10-09 17:00:52 -0500 |
| commit | 479afffe214759276afece3797b1677c7e1b39d4 (patch) | |
| tree | bb36d668789197ce407b1b56c4b7237faedbb73d /drivers/gpu/drm/amd/powerplay/smumgr | |
| parent | e5a4059ceb4c353b1b151f5f7f7b00fd399e4ceb (diff) | |
drm/amd/pp: Remove wrong code in fiji_start_smu
HW CG feature will be enabled after hw ip initialized
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smumgr')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c index ec14798e87b6..b6b62a79c8bb 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c @@ -302,16 +302,6 @@ static int fiji_start_smu(struct pp_hwmgr *hwmgr) hwmgr->avfs_supported = false; } - /* To initialize all clock gating before RLC loaded and running.*/ - amdgpu_device_ip_set_clockgating_state(hwmgr->adev, - AMD_IP_BLOCK_TYPE_GFX, AMD_CG_STATE_GATE); - amdgpu_device_ip_set_clockgating_state(hwmgr->adev, - AMD_IP_BLOCK_TYPE_GMC, AMD_CG_STATE_GATE); - amdgpu_device_ip_set_clockgating_state(hwmgr->adev, - AMD_IP_BLOCK_TYPE_SDMA, AMD_CG_STATE_GATE); - amdgpu_device_ip_set_clockgating_state(hwmgr->adev, - AMD_IP_BLOCK_TYPE_COMMON, AMD_CG_STATE_GATE); - /* Setup SoftRegsStart here for register lookup in case * DummyBackEnd is used and ProcessFirmwareHeader is not executed */ |