diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2019-06-04 14:37:05 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-21 18:59:33 -0500 |
commit | 6ad68a7e1f3ebda4971363b395f50ebea3745ed6 (patch) | |
tree | b94f7a28fe58911e3e11aaa20a09d45355185bfc /drivers/gpu/drm/amd | |
parent | 591745854893330adc3bd44389045ba0011f6efe (diff) |
drm/amdgpu/gfx10: update to latest golden setting
Fix UTCL1_CGTT_CLK_CTRL
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index 5c35bb2a441b..bee7d0c4c31f 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -100,7 +100,7 @@ static const struct soc15_reg_golden golden_settings_gc_10_1[] = SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_LDS_CLK_CTRL, 0xffffffff, 0xffffffff), SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0xfff7ffff, 0x01030000), SOC15_REG_GOLDEN_VALUE(GC, 0, mmTCP_CNTL, 0x60000010, 0x479c0010), - SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CGTT_CLK_CTRL, 0x40000ff0, 0x40000100), + SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CGTT_CLK_CTRL, 0xfeff0fff, 0x40000100), SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0x00800000, 0x00800000) }; |