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authorLiviu Dudau <Liviu.Dudau@arm.com>2017-03-22 10:44:57 +0000
committerLiviu Dudau <Liviu.Dudau@arm.com>2017-04-24 10:45:33 +0100
commit85f6421889eca68ceb0a0403c4c00b2eaf3c16e0 (patch)
treed010c422ee0fbe187dc7c42e1326d66ce910e412 /drivers/gpu/drm/arm/malidp_hw.h
parent46f1d42f273836a3b8840637b9ee3d98a528ffd2 (diff)
drm: mali-dp: Enable power management for the device.
Enable runtime and system Power Management. Clocks are now managed from malidp_crtc_{enable,disable} functions. Suspend-to-RAM tested as working on Juno. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Diffstat (limited to 'drivers/gpu/drm/arm/malidp_hw.h')
-rw-r--r--drivers/gpu/drm/arm/malidp_hw.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/arm/malidp_hw.h b/drivers/gpu/drm/arm/malidp_hw.h
index 00974b59407d..ea2dbae08990 100644
--- a/drivers/gpu/drm/arm/malidp_hw.h
+++ b/drivers/gpu/drm/arm/malidp_hw.h
@@ -156,6 +156,9 @@ struct malidp_hw_device {
u8 min_line_size;
u16 max_line_size;
+ /* track the device PM state */
+ bool pm_suspended;
+
/* size of memory used for rotating layers, up to two banks available */
u32 rotation_memory[2];
};
@@ -173,12 +176,14 @@ extern const struct malidp_hw_device malidp_device[MALIDP_MAX_DEVICES];
static inline u32 malidp_hw_read(struct malidp_hw_device *hwdev, u32 reg)
{
+ WARN_ON(hwdev->pm_suspended);
return readl(hwdev->regs + reg);
}
static inline void malidp_hw_write(struct malidp_hw_device *hwdev,
u32 value, u32 reg)
{
+ WARN_ON(hwdev->pm_suspended);
writel(value, hwdev->regs + reg);
}