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authorWen He <wen.he_1@nxp.com>2019-09-10 15:59:13 +0800
committerLiviu Dudau <liviu.dudau@arm.com>2019-10-08 16:13:36 +0100
commitd298e6a27a81362af4b755db2e89469c2a609cd8 (patch)
tree7ee233b3966bedc8fd8e14c3428354ed61057635 /drivers/gpu/drm/arm/malidp_hw.h
parent354c2d310082d1c384213ba76c3757dd3cd8755d (diff)
drm/arm/mali-dp: Add display QoS interface configuration for Mali DP500
Configure the display Quality of service (QoS) levels priority if the optional property node "arm,malidp-aqros-value" is defined in DTS file. QoS signaling using AQROS and AWQOS AXI interface signals, the AQROS is driven from the "RQOS" register, so needed to program the RQOS register to avoid the high resolutions flicker issue on the LS1028A platform. Signed-off-by: Wen He <wen.he_1@nxp.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190910075913.17650-2-wen.he_1@nxp.com
Diffstat (limited to 'drivers/gpu/drm/arm/malidp_hw.h')
-rw-r--r--drivers/gpu/drm/arm/malidp_hw.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/arm/malidp_hw.h b/drivers/gpu/drm/arm/malidp_hw.h
index 968a65eed371..e4c36bc90bda 100644
--- a/drivers/gpu/drm/arm/malidp_hw.h
+++ b/drivers/gpu/drm/arm/malidp_hw.h
@@ -251,6 +251,9 @@ struct malidp_hw_device {
/* size of memory used for rotating layers, up to two banks available */
u32 rotation_memory[2];
+
+ /* priority level of RQOS register used for driven the ARQOS signal */
+ u32 arqos_value;
};
static inline u32 malidp_hw_read(struct malidp_hw_device *hwdev, u32 reg)