diff options
| author | Dave Airlie <airlied@redhat.com> | 2024-03-08 12:36:48 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2024-03-08 12:36:55 +1000 |
| commit | b0b6739cb9155c4ec6b4c50889313184175e687d (patch) | |
| tree | ccee50f15dae1177bae39c9662cf20abd4f5bbe2 /drivers/gpu/drm/etnaviv/etnaviv_gpu.c | |
| parent | 5794d2f7ebdff71a6bb8110c00ccabe08c52ef57 (diff) | |
| parent | b735ee173f84d5d0d0733c53946a83c12d770d05 (diff) | |
Merge tag 'drm-etnaviv-next-2024-03-07' of https://git.pengutronix.de/git/lst/linux into drm-next
- various code cleanups
- enhancements for NPU and MRT support
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Lucas Stach <l.stach@pengutronix.de>
Link: https://patchwork.freedesktop.org/patch/msgid/72a783cd98d60f6ebb43b90a6b453eea87224409.camel@pengutronix.de
Diffstat (limited to 'drivers/gpu/drm/etnaviv/etnaviv_gpu.c')
| -rw-r--r-- | drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c index 9b8445d2a128..734412aae94d 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -164,6 +164,26 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value) *value = gpu->identity.eco_id; break; + case ETNAVIV_PARAM_GPU_NN_CORE_COUNT: + *value = gpu->identity.nn_core_count; + break; + + case ETNAVIV_PARAM_GPU_NN_MAD_PER_CORE: + *value = gpu->identity.nn_mad_per_core; + break; + + case ETNAVIV_PARAM_GPU_TP_CORE_COUNT: + *value = gpu->identity.tp_core_count; + break; + + case ETNAVIV_PARAM_GPU_ON_CHIP_SRAM_SIZE: + *value = gpu->identity.on_chip_sram_size; + break; + + case ETNAVIV_PARAM_GPU_AXI_SRAM_SIZE: + *value = gpu->identity.axi_sram_size; + break; + default: DBG("%s: invalid param: %u", dev_name(gpu->dev), param); return -EINVAL; @@ -513,8 +533,19 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu) timeout = jiffies + msecs_to_jiffies(1000); while (time_is_after_jiffies(timeout)) { - /* enable clock */ unsigned int fscale = 1 << (6 - gpu->freq_scale); + u32 pulse_eater = 0x01590880; + + /* disable clock gating */ + gpu_write_power(gpu, VIVS_PM_POWER_CONTROLS, 0x0); + + /* disable pulse eater */ + pulse_eater |= BIT(17); + gpu_write_power(gpu, VIVS_PM_PULSE_EATER, pulse_eater); + pulse_eater |= BIT(0); + gpu_write_power(gpu, VIVS_PM_PULSE_EATER, pulse_eater); + + /* enable clock */ control = VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(fscale); etnaviv_gpu_load_clock(gpu, control); |