diff options
| author | Christoph Manszewski <c.manszewski@samsung.com> | 2018-10-25 18:21:53 +0200 |
|---|---|---|
| committer | Inki Dae <inki.dae@samsung.com> | 2018-12-05 17:26:16 +0900 |
| commit | af130280c613218a37675c6442650ca809f274c2 (patch) | |
| tree | 6f113962aa4ae2ab4b8482916b9a31fd7c864ccf /drivers/gpu/drm/exynos/regs-decon5433.h | |
| parent | 54947290ef62880936ce5bd91489d41e8b1cbc2a (diff) | |
drm/exynos: decon: Make pixel blend mode configurable
The decon hardware supports different blend modes. Add pixel blend mode
property and make it configurable, by modifying the blend equation.
Tested on TM2 with Exynos 5433 CPU, on top of linux-next-20181019.
Signed-off-by: Christoph Manszewski <c.manszewski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/regs-decon5433.h')
| -rw-r--r-- | drivers/gpu/drm/exynos/regs-decon5433.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/exynos/regs-decon5433.h b/drivers/gpu/drm/exynos/regs-decon5433.h index 72648bda3142..63db6974bf14 100644 --- a/drivers/gpu/drm/exynos/regs-decon5433.h +++ b/drivers/gpu/drm/exynos/regs-decon5433.h @@ -117,6 +117,7 @@ #define WINCONx_BPPMODE_16BPP_A4444 (0xe << 2) #define WINCONx_ALPHA_SEL_F (1 << 1) #define WINCONx_ENWIN_F (1 << 0) +#define WINCONx_BLEND_MODE_MASK (0xc2) /* SHADOWCON */ #define SHADOWCON_PROTECT_MASK GENMASK(14, 10) @@ -213,4 +214,18 @@ /* BLENDCON */ #define BLEND_NEW (1 << 0) +/* BLENDERQx */ +#define BLENDERQ_ZERO 0x0 +#define BLENDERQ_ONE 0x1 +#define BLENDERQ_ALPHA_A 0x2 +#define BLENDERQ_ONE_MINUS_ALPHA_A 0x3 +#define BLENDERQ_ALPHA0 0x6 +#define BLENDERQ_Q_FUNC_F(n) (n << 18) +#define BLENDERQ_P_FUNC_F(n) (n << 12) +#define BLENDERQ_B_FUNC_F(n) (n << 6) +#define BLENDERQ_A_FUNC_F(n) (n << 0) + +/* BLENDCON */ +#define BLEND_NEW (1 << 0) + #endif /* EXYNOS_REGS_DECON5433_H */ |