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authorAlan Previn <alan.previn.teres.alexis@intel.com>2022-03-21 09:45:15 -0700
committerLucas De Marchi <lucas.demarchi@intel.com>2022-03-22 10:33:30 -0700
commit24492514ccbd57121f168bb14939f32d8905d579 (patch)
tree23f3a03ee0821c3936b6ebe9f1e1fccd2e68c09d /drivers/gpu/drm/i915/Makefile
parent61c5ed946da28e45edc3470e8d9f4da19cb15c8d (diff)
drm/i915/guc: Update GuC ADS size for error capture lists
Update GuC ADS size allocation to include space for the lists of error state capture register descriptors. Then, populate GuC ADS with the lists of registers we want GuC to report back to host on engine reset events. This list should include global, engine-class and engine-instance registers for every engine-class type on the current hardware. Ensure we allocate a persistent store for the register lists that are populated into ADS so that we don't need to allocate memory during GT resets when GuC is reloaded and ADS population happens again. NOTE: Start with a sample static table of register lists to layout the framework before adding real registers in subsequent patch. This static register tables are a different format from the ADS populated list. Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220321164527.2500062-2-alan.previn.teres.alexis@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/Makefile')
-rw-r--r--drivers/gpu/drm/i915/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 9801aaa9885d..c837a29ffac8 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -186,6 +186,7 @@ i915-y += gt/uc/intel_uc.o \
gt/uc/intel_uc_fw.o \
gt/uc/intel_guc.o \
gt/uc/intel_guc_ads.o \
+ gt/uc/intel_guc_capture.o \
gt/uc/intel_guc_ct.o \
gt/uc/intel_guc_debugfs.o \
gt/uc/intel_guc_fw.o \