diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-02-17 09:00:41 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-02-18 01:25:00 +0200 |
| commit | 32ed4660f1bd8ccac79a10c14f8f01db4f4db668 (patch) | |
| tree | 0e74581e12ecdb3be832413de66bfb84a0ea4e5d /drivers/gpu/drm/i915/display/i9xx_plane.c | |
| parent | 63f39ad858cdf1f5f25489f31fb66adda2d1d33e (diff) | |
drm/i915: Introduce a minimal plane error state
I want to capture a little bit more information about the state
of the plane upon faults. To that end introduce a small plane error
state struct and provide per-plane vfuncs to read it out.
For now we just stick the CTL, SURF, and SURFLIVE (if available)
registers contents in there.
v2: Use struct intel_display instead of dev_priv
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250217070047.953-3-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/i9xx_plane.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/i9xx_plane.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c index aef8d8b7ea85..013295f66d56 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane.c +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c @@ -557,6 +557,40 @@ static void i9xx_plane_disable_arm(struct intel_dsb *dsb, intel_de_write_fw(display, DSPADDR(display, i9xx_plane), 0); } +static void g4x_primary_capture_error(struct intel_crtc *crtc, + struct intel_plane *plane, + struct intel_plane_error *error) +{ + struct intel_display *display = to_intel_display(plane); + enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; + + error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane)); + error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane)); + error->surflive = intel_de_read(display, DSPSURFLIVE(display, i9xx_plane)); +} + +static void i965_plane_capture_error(struct intel_crtc *crtc, + struct intel_plane *plane, + struct intel_plane_error *error) +{ + struct intel_display *display = to_intel_display(plane); + enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; + + error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane)); + error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane)); +} + +static void i8xx_plane_capture_error(struct intel_crtc *crtc, + struct intel_plane *plane, + struct intel_plane_error *error) +{ + struct intel_display *display = to_intel_display(plane); + enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; + + error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane)); + error->surf = intel_de_read(display, DSPADDR(display, i9xx_plane)); +} + static void g4x_primary_async_flip(struct intel_dsb *dsb, struct intel_plane *plane, @@ -976,6 +1010,13 @@ intel_primary_plane_create(struct intel_display *display, enum pipe pipe) plane->get_hw_state = i9xx_plane_get_hw_state; plane->check_plane = i9xx_plane_check; + if (DISPLAY_VER(display) >= 5 || display->platform.g4x) + plane->capture_error = g4x_primary_capture_error; + else if (DISPLAY_VER(display) >= 4) + plane->capture_error = i965_plane_capture_error; + else + plane->capture_error = i8xx_plane_capture_error; + if (HAS_ASYNC_FLIPS(display)) { if (display->platform.valleyview || display->platform.cherryview) { plane->async_flip = vlv_primary_async_flip; |