diff options
| author | Vinod Govindapillai <vinod.govindapillai@intel.com> | 2024-04-05 14:35:33 +0300 |
|---|---|---|
| committer | Vinod Govindapillai <vinod.govindapillai@intel.com> | 2024-04-19 16:11:42 +0300 |
| commit | aaba7a95ddffbf609261a8ba6c5d344b7cc6dca9 (patch) | |
| tree | 92f065810e88e6b34de165dad4fde83caa0f7c2a /drivers/gpu/drm/i915/display/intel_bw.h | |
| parent | 1e9e4be8d683e192aa1f524c5cc554e9e50d1262 (diff) | |
drm/i915/display: force qgv check after the hw state readout
The current intel_bw_atomic_check do not check the possbility
of a sagv configuration change after the hw state readout.
Hence cannot update the sagv configuration until some other
relevant changes like data rates, number of planes etc. happen.
Introduce a flag to force qgv check in such cases.
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240405113533.338553-7-vinod.govindapillai@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_bw.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_bw.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h index fa1e924ec961..161813cca473 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.h +++ b/drivers/gpu/drm/i915/display/intel_bw.h @@ -47,6 +47,12 @@ struct intel_bw_state { */ u16 qgv_points_mask; + /* + * Flag to force the QGV comparison in atomic check right after the + * hw state readout + */ + bool force_check_qgv; + int min_cdclk[I915_MAX_PIPES]; unsigned int data_rate[I915_MAX_PIPES]; u8 num_active_planes[I915_MAX_PIPES]; |