diff options
author | Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> | 2023-08-01 19:23:31 +0530 |
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committer | Radhakrishna Sripada <radhakrishna.sripada@intel.com> | 2023-08-07 15:36:59 -0700 |
commit | 927a8e383ab4d49fe40e1df8a92b22b62893d149 (patch) | |
tree | d97f4747f7515f4f01e2348f204b731c954c48e5 /drivers/gpu/drm/i915/display/intel_cdclk.c | |
parent | 2612e3bbc0386368a850140a6c9b990cd496a5ec (diff) |
drm/i915/hsw: s/HSW/HASWELL for platform/subplatform defines
Follow consistent naming convention. Replace HSW with
HASWELL.
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230801135344.3797924-2-dnyaneshwar.bhadane@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_cdclk.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_cdclk.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index dcc1f6941b60..f18e1f8ef22e 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -470,7 +470,7 @@ static void hsw_get_cdclk(struct drm_i915_private *dev_priv, cdclk_config->cdclk = 450000; else if (freq == LCPLL_CLK_FREQ_450) cdclk_config->cdclk = 450000; - else if (IS_HSW_ULT(dev_priv)) + else if (IS_HASWELL_ULT(dev_priv)) cdclk_config->cdclk = 337500; else cdclk_config->cdclk = 540000; |