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authorGustavo Sousa <gustavo.sousa@intel.com>2024-02-14 17:27:20 -0300
committerMatt Roper <matthew.d.roper@intel.com>2024-02-28 11:41:08 -0800
commit669cf07d83a95310b565dfd59347013013107a73 (patch)
treec19a6b54cf1fbb14405577307a25db212a1400ad /drivers/gpu/drm/i915/display/intel_cdclk.h
parent2e56e34d0d9cbce595e288676bc7eaadcebcd6e1 (diff)
drm/i915/cdclk: Rename intel_cdclk_needs_modeset to intel_cdclk_clock_changed
Looks like the name and description of intel_cdclk_needs_modeset() became inaccurate as of commit 59f9e9cab3a1 ("drm/i915: Skip modeset for cdclk changes if possible"), when it became possible to update the cdclk without requiring disabling the pipes when only changing the cd2x divider was enough. Later on we also added the same type of support with squash and crawling with commit 25e0e5ae5610 ("drm/i915/display: Do both crawl and squash when changing cdclk"), commit d4a23930490d ("drm/i915: Allow cdclk squasher to be reconfigured live") and commit d62686ba3b54 ("drm/i915/adl_p: CDCLK crawl support for ADL"). As such, update that function's name and documentation to something more appropriate, since the real checks for requiring modeset are done elsewhere. v2: - Rename to intel_cdclk_clock_changed instead of intel_cdclk_params_changed. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240214202719.298407-2-gustavo.sousa@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_cdclk.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_cdclk.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index 48fd7d39e0cd..fa301495e7f1 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -60,7 +60,7 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv);
void intel_update_max_cdclk(struct drm_i915_private *dev_priv);
void intel_update_cdclk(struct drm_i915_private *dev_priv);
u32 intel_read_rawclk(struct drm_i915_private *dev_priv);
-bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,
+bool intel_cdclk_clock_changed(const struct intel_cdclk_config *a,
const struct intel_cdclk_config *b);
void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state);
void intel_set_cdclk_post_plane_update(struct intel_atomic_state *state);