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| author | Imre Deak <imre.deak@intel.com> | 2022-04-15 00:06:52 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2022-04-20 20:42:12 +0300 |
| commit | eb6dedcc194a5bdbe7e47ad111771abb4ebdd2b8 (patch) | |
| tree | 511156b3323fd609147d9440f30949947a6af2bd /drivers/gpu/drm/i915/display/intel_display.h | |
| parent | 13344a9bdd38a8938dad385521ce601cecf4f4f7 (diff) | |
drm/i915: Sanitize the ADL-S power well definition
Instead of the skip_mask special casing of the ADL-S power well
descriptors, add a power well descriptor list for ADL-S as well reusing
the TGL descriptors, w/o the TC-cold power well. ADL-S doesn't have
TypeC PHYs, so a better way would be having ADL-S specific AUX
descriptors, but I left changing this for a follow-up.
This changes the ordering of the AUX and TC-cold vs. PW_4/5 power wells
on TGL and ADL-S, but this shouldn't make a difference (PW_4/5 don't
depend on the AUX/TC-cold power wells).
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220414210657.1785773-13-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display.h')
0 files changed, 0 insertions, 0 deletions