diff options
author | Imre Deak <imre.deak@intel.com> | 2024-01-29 19:55:30 +0200 |
---|---|---|
committer | Imre Deak <imre.deak@intel.com> | 2024-04-10 19:12:57 +0300 |
commit | d4e745ba81c335118c3ec5860c8b73381de2a7a9 (patch) | |
tree | c3b68ea8e6756d6766f0b8714b514fdd1a4d2c71 /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
parent | 1af52d0555b9ffcbce8bdc9d28a9e81c81a53274 (diff) |
drm/i915/adlp: Add DP MST DPT/DPTP alignment WA (Wa_14014143976)
Add a workaround to fix BS-BS jitter issues on MST links, aligning
DPT/DPTP MTPs.
Bspec: 50050, 55424
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240129175533.904590-4-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index fc5455a55bd7..641dd6113a2f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -1141,6 +1141,9 @@ static void enable_bs_jitter_was(const struct intel_crtc_state *crtc_state) set |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder); else if (crtc_state->fec_enable) clear |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder); + + if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state)) + set |= DP_MST_DPT_DPTP_ALIGN_WA(crtc_state->cpu_transcoder); } if (!clear && !set) |