diff options
| author | Anna Karas <anna.karas@intel.com> | 2019-09-26 15:35:59 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-10-25 12:06:21 +0100 |
| commit | d328bd4f905834c7d87a49962ebc96e397aab7b9 (patch) | |
| tree | 3df4a28dee8b0a108aec1b32ba1294859b195953 /drivers/gpu/drm/i915/display/intel_dpll_mgr.h | |
| parent | 900554dc6bfc996ad07b9e187bbfd3864cd5bed0 (diff) | |
drm/i915/tgl: Fix doc not corresponding to code
Replace PLLs names used in documentation to that used in the code.
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Fixes: 68ff39c3f8c0 ("drm/i915/tgl: Add new pll ids")
Signed-off-by: Anna Karas <anna.karas@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190926123559.15717-1-anna.karas@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll_mgr.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h index 8ee97c17af67..2a104c64291d 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h @@ -147,11 +147,11 @@ enum intel_dpll_id { */ DPLL_ID_ICL_MGPLL4 = 6, /** - * @DPLL_ID_TGL_TCPLL5: TGL TC PLL port 5 (TC5) + * @DPLL_ID_TGL_MGPLL5: TGL TC PLL port 5 (TC5) */ DPLL_ID_TGL_MGPLL5 = 7, /** - * @DPLL_ID_TGL_TCPLL6: TGL TC PLL port 6 (TC6) + * @DPLL_ID_TGL_MGPLL6: TGL TC PLL port 6 (TC6) */ DPLL_ID_TGL_MGPLL6 = 8, }; |