diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-05-16 16:56:13 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-05-22 15:45:34 +0300 |
| commit | 04c09e4b879b225f3747606bcfc97d00d82d800f (patch) | |
| tree | 5e2881342b999c1a97a09f1756b9ac307cd282a7 /drivers/gpu/drm/i915/display/intel_psr_regs.h | |
| parent | 199bc8c175d712be1610dcad7f7240ad5c864281 (diff) | |
drm/i915: Simplify PIPESRC_ERLY_TPT definition
PIPESRC_ERLY_TPT is a pipe register, and it lives in the 0x70000 range.
so using _MMIO_TRANS2() for it is not really correct. Also since this
is a pipe register, and not present on CHV, the registers will be
equally spaced out, so we can use the simpler _MMIO_PIPE() instead
of _MMIO_PIPE2().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_psr_regs.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr_regs.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h index b6a39926ccb6..23851513054a 100644 --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h @@ -252,8 +252,8 @@ /* PSR2 Early transport */ #define _PIPE_SRCSZ_ERLY_TPT_A 0x70074 - -#define PIPE_SRCSZ_ERLY_TPT(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _PIPE_SRCSZ_ERLY_TPT_A) +#define _PIPE_SRCSZ_ERLY_TPT_B 0x71074 +#define PIPE_SRCSZ_ERLY_TPT(pipe) _MMIO_PIPE((pipe), _PIPE_SRCSZ_ERLY_TPT_A, _PIPE_SRCSZ_ERLY_TPT_B) #define _SEL_FETCH_PLANE_BASE_1_A 0x70890 #define _SEL_FETCH_PLANE_BASE_2_A 0x708B0 |