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authorJani Nikula <jani.nikula@intel.com>2024-04-30 13:10:10 +0300
committerJani Nikula <jani.nikula@intel.com>2024-05-06 10:25:41 +0300
commit13b77ac5dc91a8aaac23d8be3a9a9d4c9a2dd4cf (patch)
treea8d2d8d1d49d5612ec358dadd8ebdcd012f618cc /drivers/gpu/drm/i915/display/intel_psr_regs.h
parentdb92d423dc360ba957314e3c87ae67108216a6da (diff)
drm/i915: pass dev_priv explicitly to ALPM_CTL
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the ALPM_CTL register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/96da9be36dc93fa9a7c329f25ff963e4998998c1.1714471597.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_psr_regs.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_psr_regs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index a10cf5120efb..8d7f8408ef8e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -297,7 +297,7 @@
_SEL_FETCH_PLANE_BASE_1_A)
#define _ALPM_CTL_A 0x60950
-#define ALPM_CTL(tran) _MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)
+#define ALPM_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)
#define ALPM_CTL_ALPM_ENABLE REG_BIT(31)
#define ALPM_CTL_ALPM_AUX_LESS_ENABLE REG_BIT(30)
#define ALPM_CTL_LOBF_ENABLE REG_BIT(29)