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authorJani Nikula <jani.nikula@intel.com>2024-04-30 13:09:56 +0300
committerJani Nikula <jani.nikula@intel.com>2024-05-06 10:25:20 +0300
commit676a6a1c99182a193b7515faebbe3cafc653e706 (patch)
tree9e41211bebb49a5aac4d3e78290018e089734d10 /drivers/gpu/drm/i915/display/intel_psr_regs.h
parent1d231cd89841d1538d984a872041e5579b403bca (diff)
drm/i915: pass dev_priv explicitly to EDP_PSR_CTL
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the EDP_PSR_CTL register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/198858bc3925c02c0975670e3ebb5ce2084ac658.1714471597.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_psr_regs.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_psr_regs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index 0e0c71ea9fe3..d815f08aac2c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -23,7 +23,7 @@
#define HSW_SRD_CTL _MMIO(0x64800)
#define _SRD_CTL_A 0x60800
#define _SRD_CTL_EDP 0x6f800
-#define EDP_PSR_CTL(tran) _MMIO_TRANS2(dev_priv, tran, _SRD_CTL_A)
+#define EDP_PSR_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _SRD_CTL_A)
#define EDP_PSR_ENABLE REG_BIT(31)
#define BDW_PSR_SINGLE_FRAME REG_BIT(30)
#define EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK REG_BIT(29) /* SW can't modify */