diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2020-03-31 16:23:48 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-03-31 21:51:08 +0100 |
| commit | 4d6c18590870fbac1e65dde5e01e621c8e0ca096 (patch) | |
| tree | 6583bf608ccee4539c67ae7b4827ed67db585cd5 /drivers/gpu/drm/i915/gt/intel_rps.c | |
| parent | 708c82d59b149bd0c146108794f00fc357a7853d (diff) | |
drm/i915/gt: Fill all the unused space in the GGTT
When we allocate space in the GGTT we may have to allocate a larger
region than will be populated by the object to accommodate fencing. Make
sure that this space beyond the end of the buffer points safely into
scratch space, in case the HW tries to access it anyway (e.g. fenced
access to the last tile row).
v2: Preemptively / conservatively guard gen6 ggtt as well.
Reported-by: Imre Deak <imre.deak@intel.com>
References: https://gitlab.freedesktop.org/drm/intel/-/issues/1554
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200331152348.26946-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_rps.c')
0 files changed, 0 insertions, 0 deletions