diff options
| author | Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com> | 2020-07-07 17:39:50 -0700 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-07-08 21:13:09 +0100 |
| commit | 0b6613c6b91ec5f437495c438ca047af4e47b423 (patch) | |
| tree | 9a6f74c48de4cc95ef881fbb16d2b98b16997ae9 /drivers/gpu/drm/i915/gt/intel_sseu.c | |
| parent | 9b413f011c2c62f4d7e1a02ac8add4899a4bc79b (diff) | |
drm/i915/sseu: Move sseu_info under gt_info
SSEUs are a GT capability, so track them under gt_info.
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200708003952.21831-8-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_sseu.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_sseu.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c index 14c15cca3371..f1c039e1b5ad 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu.c +++ b/drivers/gpu/drm/i915/gt/intel_sseu.c @@ -128,7 +128,7 @@ static void gen11_compute_sseu_info(struct sseu_dev_info *sseu, static void gen12_sseu_info_init(struct intel_gt *gt) { - struct sseu_dev_info *sseu = &RUNTIME_INFO(gt->i915)->sseu; + struct sseu_dev_info *sseu = >->info.sseu; struct intel_uncore *uncore = gt->uncore; u32 dss_en; u16 eu_en = 0; @@ -163,7 +163,7 @@ static void gen12_sseu_info_init(struct intel_gt *gt) static void gen11_sseu_info_init(struct intel_gt *gt) { - struct sseu_dev_info *sseu = &RUNTIME_INFO(gt->i915)->sseu; + struct sseu_dev_info *sseu = >->info.sseu; struct intel_uncore *uncore = gt->uncore; u32 ss_en; u8 eu_en; @@ -192,7 +192,7 @@ static void gen11_sseu_info_init(struct intel_gt *gt) static void gen10_sseu_info_init(struct intel_gt *gt) { struct intel_uncore *uncore = gt->uncore; - struct sseu_dev_info *sseu = &RUNTIME_INFO(gt->i915)->sseu; + struct sseu_dev_info *sseu = >->info.sseu; const u32 fuse2 = intel_uncore_read(uncore, GEN8_FUSE2); const int eu_mask = 0xff; u32 subslice_mask, eu_en; @@ -268,7 +268,7 @@ static void gen10_sseu_info_init(struct intel_gt *gt) static void cherryview_sseu_info_init(struct intel_gt *gt) { - struct sseu_dev_info *sseu = &RUNTIME_INFO(gt->i915)->sseu; + struct sseu_dev_info *sseu = >->info.sseu; u32 fuse; u8 subslice_mask = 0; @@ -325,7 +325,7 @@ static void gen9_sseu_info_init(struct intel_gt *gt) { struct drm_i915_private *i915 = gt->i915; struct intel_device_info *info = mkwrite_device_info(i915); - struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu; + struct sseu_dev_info *sseu = >->info.sseu; struct intel_uncore *uncore = gt->uncore; u32 fuse2, eu_disable, subslice_mask; const u8 eu_mask = 0xff; @@ -430,7 +430,7 @@ static void gen9_sseu_info_init(struct intel_gt *gt) static void bdw_sseu_info_init(struct intel_gt *gt) { - struct sseu_dev_info *sseu = &RUNTIME_INFO(gt->i915)->sseu; + struct sseu_dev_info *sseu = >->info.sseu; struct intel_uncore *uncore = gt->uncore; int s, ss; u32 fuse2, subslice_mask, eu_disable[3]; /* s_max */ @@ -516,7 +516,7 @@ static void bdw_sseu_info_init(struct intel_gt *gt) static void hsw_sseu_info_init(struct intel_gt *gt) { struct drm_i915_private *i915 = gt->i915; - struct sseu_dev_info *sseu = &RUNTIME_INFO(gt->i915)->sseu; + struct sseu_dev_info *sseu = >->info.sseu; u32 fuse1; u8 subslice_mask = 0; int s, ss; @@ -601,10 +601,11 @@ void intel_sseu_info_init(struct intel_gt *gt) gen12_sseu_info_init(gt); } -u32 intel_sseu_make_rpcs(struct drm_i915_private *i915, +u32 intel_sseu_make_rpcs(struct intel_gt *gt, const struct intel_sseu *req_sseu) { - const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu; + struct drm_i915_private *i915 = gt->i915; + const struct sseu_dev_info *sseu = >->info.sseu; bool subslice_pg = sseu->has_subslice_pg; u8 slices, subslices; u32 rpcs = 0; |