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authorRadhakrishna Sripada <radhakrishna.sripada@intel.com>2023-05-05 16:45:44 -0700
committerRadhakrishna Sripada <radhakrishna.sripada@intel.com>2023-05-08 10:09:09 -0700
commit5b8ff071b57e0a50a0e6eb8db55d159a68853f6b (patch)
tree2d94ae1770e629ec27c0f7a66823b529c1a6676f /drivers/gpu/drm/i915/gt/intel_workarounds.c
parent0da6bfe857ea9399498876cbe6ef428637b6e475 (diff)
drm/i915/mtl: Fix the wa number for Wa_22016670082
Fixes the right lineage number for the workaround. Fixes: a7fa1537b791 ("drm/i915/mtl: Implement Wa_14019141245") Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230505234544.4029535-1-radhakrishna.sripada@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_workarounds.c')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_workarounds.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index ad9e7f49a6fa..786349e95487 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1699,7 +1699,7 @@ xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);
wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB);
- /* Wa_14019141245 */
+ /* Wa_22016670082 */
wa_write_or(wal, GEN12_SQCNT1, GEN12_STRICT_RAR_ENABLE);
if (IS_MTL_GRAPHICS_STEP(gt->i915, M, STEP_A0, STEP_B0) ||