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| author | Jani Nikula <jani.nikula@intel.com> | 2020-06-25 18:05:03 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2020-06-25 18:05:03 +0300 |
| commit | 0f69403d2535ffc7200a8414cf3ca66a49b0d741 (patch) | |
| tree | 3ce85dd08359ea872aa8fb9bd12072efdb80a787 /drivers/gpu/drm/i915/gvt/scheduler.c | |
| parent | 580fbdc5136822208f107500682e50a1cb232e94 (diff) | |
| parent | 0a19b068acc47d05212f03e494381926dc0381e2 (diff) | |
Merge drm/drm-next into drm-intel-next-queued
Catch up with upstream, in particular to get c1e8d7c6a7a6 ("mmap locking
API: convert mmap_sem comments").
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/scheduler.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/scheduler.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c index f5dc52a80fe5..3c3b9842bbbd 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.c +++ b/drivers/gpu/drm/i915/gvt/scheduler.c @@ -416,7 +416,11 @@ static void set_context_ppgtt_from_shadow(struct intel_vgpu_workload *workload, for (i = 0; i < GVT_RING_CTX_NR_PDPS; i++) { struct i915_page_directory * const pd = i915_pd_entry(ppgtt->pd, i); - + /* skip now as current i915 ppgtt alloc won't allocate + top level pdp for non 4-level table, won't impact + shadow ppgtt. */ + if (!pd) + break; px_dma(pd) = mm->ppgtt_mm.shadow_pdps[i]; } } |