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authorMatt Roper <matthew.d.roper@intel.com>2023-10-19 10:02:42 -0700
committerMatt Roper <matthew.d.roper@intel.com>2023-10-24 12:21:22 -0700
commit8fa1c7cd1fe9cdfc426a603e1f1eecd3f463c487 (patch)
treea40b2667e58d9ae7cd69b3f8edd2ba7fb47f64fd /drivers/gpu/drm/i915/i915_pmu.c
parenta1c613ae4c322ddd58d5a8539dbfba2a0380a8c0 (diff)
drm/i915/mcr: Hold GT forcewake during steering operations
The steering control and semaphore registers are inside an "always on" power domain with respect to RC6. However there are some issues if higher-level platform sleep states are entering/exiting at the same time these registers are accessed. Grabbing GT forcewake and holding it over the entire lock/steer/unlock cycle ensures that those sleep states have been fully exited before we access these registers. This is expected to become a formally documented/numbered workaround soon. Note that this patch alone isn't expected to have an immediately noticeable impact on MCR (mis)behavior; an upcoming pcode firmware update will also be necessary to provide the other half of this workaround. v2: - Move the forcewake inside the Xe_LPG-specific IP version check. This should only be necessary on platforms that have a steering semaphore. Fixes: 3100240bf846 ("drm/i915/mtl: Add hardware-level lock for steering") Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231019170241.2102037-2-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pmu.c')
0 files changed, 0 insertions, 0 deletions