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authorJani Nikula <jani.nikula@intel.com>2016-06-03 17:57:05 +0300
committerJani Nikula <jani.nikula@intel.com>2016-06-06 09:44:40 +0300
commitf90e8c36c8864472e4f8524de78633272de33b88 (patch)
tree98e368af4aac4c08e84f1e906a5fa22aebb48d99 /drivers/gpu/drm/i915/i915_vgpu.c
parent1750d59dfa3caf1fc5354a2217f0e83d717c9b22 (diff)
drm/i915/dsi: fix bxt split screen and color issue
Fix the failure mode where the display appears split, or shifted about 2/3 of the screen, and the color components are cycled. Turns out we were missing the crucial BXT_DEFEATURE_DPI_FIFO_CTR bit in the EOT_DISABLE register. Per bspec, with the bit set, the "mipi_dpf_vblank_start" signal is asserted only when the complete frame is transferred in the DPHY line and also the DPI FIFO is flushed out at the end of each frame. The problem was mitigated by keeping the panel fitter enabled, but that only limited the issue to a shift of about 0..10 pixels. With the fix here, the panel fitter workaround does not seem to be needed at all. While at it, set BXT_DPHY_DEFEATURE_EN in EOT_DISABLE register which is also needed per the BXT DSI mode set sequence. Issue: VIZ-7610 Cc: Mika Kahola <mika.kahola@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Ramalingam C <ramalingam.c@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1464965825-31035-1-git-send-email-jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_vgpu.c')
0 files changed, 0 insertions, 0 deletions