diff options
| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-06-22 14:22:09 -0700 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-06-25 09:04:08 -0700 |
| commit | cbeeb00f14d2bf71200cbfad329a62be6309f7e2 (patch) | |
| tree | 576fdaf391419f93b2c56467c173ce89d090a557 /drivers/gpu/drm/i915/intel_dram.c | |
| parent | c4449742a7c2c4f565cef5604738cfcb29769db9 (diff) | |
drm/i915/display: fix level 0 adjustement on display ver >= 12
We should no longer increment level 0 by 1usec when we have 16Gb DIMMs.
Instead spec says to add 3usec (as opposed to 2) to each valid level
when punit replies 0 to level 0.
So set wm_lv_0_adjust_needed to false for DISPLAY_VER() >= 12 and set
the proper adjustment value when handling WaWmMemoryReadLatency.
Bspec: 49326, 4381
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210622212210.3746133-1-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dram.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dram.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dram.c b/drivers/gpu/drm/i915/intel_dram.c index 50fdea84ba70..879b0f007be3 100644 --- a/drivers/gpu/drm/i915/intel_dram.c +++ b/drivers/gpu/drm/i915/intel_dram.c @@ -484,8 +484,7 @@ static int gen11_get_dram_info(struct drm_i915_private *i915) static int gen12_get_dram_info(struct drm_i915_private *i915) { - /* Always needed for GEN12+ */ - i915->dram_info.wm_lv_0_adjust_needed = true; + i915->dram_info.wm_lv_0_adjust_needed = false; return icl_pcode_read_mem_global_info(i915); } |