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authorCK Hu <ck.hu@mediatek.com>2020-08-28 17:05:11 +0800
committerChun-Kuang Hu <chunkuang.hu@kernel.org>2020-12-29 07:12:36 +0800
commitf22a565d10e756f1a6141ecd8762c58aa1788db8 (patch)
tree37487b4f6593e37e7bf42c8296492c06a7780881 /drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
parent993fd584942a75edda5e9cdec24c590c7a766b2d (diff)
drm/mediatek: Use struct cmdq_client_reg to gather cmdq variable
struct cmdq_client_reg include subsys and offset, so use it to replace these two variable. Signed-off-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c')
-rw-r--r--drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c26
1 files changed, 7 insertions, 19 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 775bc37c4045..14371d5863ae 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -96,8 +96,8 @@ void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value,
{
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
if (cmdq_pkt)
- cmdq_pkt_write(cmdq_pkt, comp->subsys,
- comp->regs_pa + offset, value);
+ cmdq_pkt_write(cmdq_pkt, comp->cmdq_reg.subsys,
+ comp->cmdq_reg.offset + offset, value);
else
#endif
writel(value, regs + offset);
@@ -109,8 +109,8 @@ void mtk_ddp_write_relaxed(struct cmdq_pkt *cmdq_pkt, unsigned int value,
{
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
if (cmdq_pkt)
- cmdq_pkt_write(cmdq_pkt, comp->subsys,
- comp->regs_pa + offset, value);
+ cmdq_pkt_write(cmdq_pkt, comp->cmdq_reg.subsys,
+ comp->cmdq_reg.offset + offset, value);
else
#endif
writel_relaxed(value, regs + offset);
@@ -122,8 +122,8 @@ void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt, unsigned int value,
{
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
if (cmdq_pkt) {
- cmdq_pkt_write_mask(cmdq_pkt, comp->subsys,
- comp->regs_pa + offset, value, mask);
+ cmdq_pkt_write_mask(cmdq_pkt, comp->cmdq_reg.subsys,
+ comp->cmdq_reg.offset + offset, value, mask);
} else {
#endif
u32 tmp = readl(regs + offset);
@@ -558,10 +558,6 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp,
struct platform_device *comp_pdev;
enum mtk_ddp_comp_type type;
struct mtk_ddp_comp_dev *priv;
-#if IS_REACHABLE(CONFIG_MTK_CMDQ)
- struct resource res;
- struct cmdq_client_reg cmdq_reg;
-#endif
int ret;
if (comp_id < 0 || comp_id >= DDP_COMPONENT_ID_MAX)
@@ -591,17 +587,9 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp,
comp->dev = &comp_pdev->dev;
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
- if (of_address_to_resource(node, 0, &res) != 0) {
- dev_err(comp->dev, "Missing reg in %s node\n", node->full_name);
- return -EINVAL;
- }
- comp->regs_pa = res.start;
-
- ret = cmdq_dev_get_client_reg(comp->dev, &cmdq_reg, 0);
+ ret = cmdq_dev_get_client_reg(comp->dev, &comp->cmdq_reg, 0);
if (ret)
dev_dbg(comp->dev, "get mediatek,gce-client-reg fail!\n");
- else
- comp->subsys = cmdq_reg.subsys;
#endif
/* Only DMA capable components need the LARB property */