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authorJoonas Lahtinen <joonas.lahtinen@linux.intel.com>2022-04-12 11:28:42 +0300
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>2022-04-12 11:28:42 +0300
commitc16c8bfa09d5f318c1bd65698d058d3739970c24 (patch)
treea3ac5a1cad695c93d698cfff0b7629fd1a2ff79c /drivers/gpu/drm/msm/dsi/dsi_cfg.c
parent8e7e5c077cd57ee9a36d58c65f07257dc49a88d5 (diff)
parentb85ffe47c4ec172214a38b7e7087c60582c488f0 (diff)
Merge drm/drm-next into drm-intel-gt-next
Pull in TTM changes needed for DG2 CCS enabling from Ram. Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/dsi_cfg.c')
-rw-r--r--drivers/gpu/drm/msm/dsi/dsi_cfg.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 96bbc8b6d009..2c23324a2296 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -213,6 +213,24 @@ static const struct msm_dsi_config sc7280_dsi_cfg = {
.num_dsi = 1,
};
+static const char * const dsi_qcm2290_bus_clk_names[] = {
+ "iface", "bus",
+};
+
+static const struct msm_dsi_config qcm2290_dsi_cfg = {
+ .io_offset = DSI_6G_REG_SHIFT,
+ .reg_cfg = {
+ .num = 1,
+ .regs = {
+ {"vdda", 21800, 4 }, /* 1.2 V */
+ },
+ },
+ .bus_clk_names = dsi_qcm2290_bus_clk_names,
+ .num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names),
+ .io_start = { 0x5e94000 },
+ .num_dsi = 1,
+};
+
static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
.link_clk_set_rate = dsi_link_clk_set_rate_v2,
.link_clk_enable = dsi_link_clk_enable_v2,
@@ -300,3 +318,8 @@ const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
return cfg_hnd;
}
+/* Non autodetect configs */
+const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler = {
+ .cfg = &qcm2290_dsi_cfg,
+ .ops = &msm_dsi_6g_v2_host_ops,
+};