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authorDave Airlie <airlied@redhat.com>2017-03-08 12:54:58 +1000
committerDave Airlie <airlied@redhat.com>2017-03-08 12:54:58 +1000
commit6796b129b0e98162a84e0b6322ac28587556d427 (patch)
treefbfdc303194fc3f5a643d5606aff00ba2187037f /drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h
parent2e16101780e9cc8c4c68566db002e7513a1530eb (diff)
parent97e5268d57bb2ec9c82cf8758fa97a2f04ea9d1b (diff)
Merge branch 'linux-4.12' of git://github.com/skeggsb/linux into drm-next
- Re-architecture of the code to handle proprietary fw, more abstracted to support the multitude of differences that NVIDIA introduce - Support in the said code for GP10x ACR and GR fw, giving acceleration support \o/ - Fix for GTX 970 GPUs that are in an odd MMU configuration * 'linux-4.12' of git://github.com/skeggsb/linux: (60 commits) drm/nouveau/fb/gf100-: rework ram detection drm/nouveau/fb/gm200: split ram implementation from gm107 drm/nouveau/fb/gf108: split implementation from gf100 drm/nouveau/fb/gf100-: modify constructors to allow more customisation drm/nouveau/kms/nv50: use drm core i2c-over-aux algorithm drm/nouveau/i2c/g94-: return REPLY_M value on reads drm/nouveau/i2c: modify aux interface to return length actually transferred drm/nouveau/gp10x: enable secboot and GR drm/nouveau/gr/gp102: initial support drm/nouveau/falcon: support for gp10x msgqueue drm/nouveau/secboot: add gp102/gp104/gp106/gp107 support drm/nouveau/secboot: put HS code loading code into own file drm/nouveau/secboot: support for r375 ACR drm/nouveau/secboot: support for r367 ACR drm/nouveau/secboot: support for r364 ACR drm/nouveau/secboot: workaround bug when starting SEC2 firmware drm/nouveau/secboot: support standard NVIDIA HS binaries drm/nouveau/secboot: support for unload blob bootloader drm/nouveau/secboot: let callers interpret return value of blobs drm/nouveau/secboot: support for different load and unload falcons ...
Diffstat (limited to 'drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h')
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h
index 7e498e65b1e8..e1a854e2ade1 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h
@@ -10,6 +10,7 @@ enum nvkm_falcon_dmaidx {
FALCON_DMAIDX_PHYS_VID = 2,
FALCON_DMAIDX_PHYS_SYS_COH = 3,
FALCON_DMAIDX_PHYS_SYS_NCOH = 4,
+ FALCON_SEC2_DMAIDX_UCODE = 6,
};
struct nvkm_falcon {
@@ -19,11 +20,13 @@ struct nvkm_falcon {
u32 addr;
struct mutex mutex;
+ struct mutex dmem_mutex;
const struct nvkm_subdev *user;
u8 version;
u8 secret;
bool debug;
+ bool has_emem;
struct nvkm_memory *core;
bool external;
@@ -45,8 +48,14 @@ struct nvkm_falcon {
struct nvkm_engine engine;
};
+/* This constructor must be called from the owner's oneinit() hook and
+ * *not* its constructor. This is to ensure that DEVINIT has been
+ * completed, and that the device is correctly enabled before we touch
+ * falcon registers.
+ */
int nvkm_falcon_v1_new(struct nvkm_subdev *owner, const char *name, u32 addr,
struct nvkm_falcon **);
+
void nvkm_falcon_del(struct nvkm_falcon **);
int nvkm_falcon_get(struct nvkm_falcon *, const struct nvkm_subdev *);
void nvkm_falcon_put(struct nvkm_falcon *, const struct nvkm_subdev *);