diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2010-02-12 10:27:35 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2010-02-25 15:08:44 +1000 |
| commit | a1606a9596e54da90ad6209071b357a4c1b0fa82 (patch) | |
| tree | 1f01726a80ea1e374d87fb6c6ebe3bbc6015b36a /drivers/gpu/drm/nouveau/nouveau_dma.c | |
| parent | d87897d4c853a5c136f60efa858d0d4cb3740f57 (diff) | |
drm/nouveau: new gem pushbuf interface, bump to 0.0.16
This commit breaks the userspace interface, and requires a new libdrm for
nouveau to operate again.
The multiple GEM_PUSHBUF ioctls that were present in 0.0.15 for
compatibility purposes are now gone, and replaced with the new ioctl which
allows for multiple push buffers to be submitted (necessary for hw index
buffers in the nv50 3d driver) and relocations to be applied on any buffer.
A number of other ioctls (CARD_INIT, GEM_PIN, GEM_UNPIN) that were needed
for userspace modesetting have also been removed.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_dma.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_dma.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c index 679b03c28df1..c8482a108a78 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.c +++ b/drivers/gpu/drm/nouveau/nouveau_dma.c @@ -179,7 +179,7 @@ READ_GET(struct nouveau_channel *chan, uint32_t *prev_get, uint32_t *timeout) void nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo, - int delta, int dwords) + int delta, int length) { struct nouveau_bo *pb = chan->pushbuf_bo; uint64_t offset = bo->bo.offset + delta; @@ -187,7 +187,7 @@ nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo, BUG_ON(chan->dma.ib_free < 1); nouveau_bo_wr32(pb, ip++, lower_32_bits(offset)); - nouveau_bo_wr32(pb, ip++, upper_32_bits(offset) | dwords << 10); + nouveau_bo_wr32(pb, ip++, upper_32_bits(offset) | length << 8); chan->dma.ib_put = (chan->dma.ib_put + 1) & chan->dma.ib_max; nvchan_wr32(chan, 0x8c, chan->dma.ib_put); |