drm/nouveau/disp: switch to device pri macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

1 files changed, 19 insertions, 15 deletions

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm204.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm204.c
index 3078f4d91972..4c61702ede8a 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm204.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm204.c
@@ -42,12 +42,13 @@ void
 gm204_sor_magic(struct nvkm_output *outp)
 {
 	struct nv50_disp *disp = (void *)nvkm_disp(outp);
+	struct nvkm_device *device = disp->base.engine.subdev.device;
 	const u32 soff = outp->or * 0x100;
 	const u32 data = outp->or + 1;
 	if (outp->info.sorconf.link & 1)
-		nv_mask(disp, 0x612308 + soff, 0x0000001f, 0x00000000 | data);
+		nvkm_mask(device, 0x612308 + soff, 0x0000001f, 0x00000000 | data);
 	if (outp->info.sorconf.link & 2)
-		nv_mask(disp, 0x612388 + soff, 0x0000001f, 0x00000010 | data);
+		nvkm_mask(device, 0x612388 + soff, 0x0000001f, 0x00000010 | data);
 }
 
 static inline u32
@@ -60,12 +61,13 @@ static int
 gm204_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
 {
 	struct nv50_disp *disp = (void *)nvkm_disp(outp);
+	struct nvkm_device *device = disp->base.engine.subdev.device;
 	const u32 soff = gm204_sor_soff(outp);
 	const u32 data = 0x01010101 * pattern;
 	if (outp->base.info.sorconf.link & 1)
-		nv_mask(disp, 0x61c110 + soff, 0x0f0f0f0f, data);
+		nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
 	else
-		nv_mask(disp, 0x61c12c + soff, 0x0f0f0f0f, data);
+		nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
 	return 0;
 }
 
@@ -73,6 +75,7 @@ static int
 gm204_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
 {
 	struct nv50_disp *disp = (void *)nvkm_disp(outp);
+	struct nvkm_device *device = disp->base.engine.subdev.device;
 	const u32 soff = gm204_sor_soff(outp);
 	const u32 loff = gm204_sor_loff(outp);
 	u32 mask = 0, i;
@@ -80,8 +83,8 @@ gm204_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
 	for (i = 0; i < nr; i++)
 		mask |= 1 << (gm204_sor_dp_lane_map(disp, i) >> 3);
 
-	nv_mask(disp, 0x61c130 + loff, 0x0000000f, mask);
-	nv_mask(disp, 0x61c034 + soff, 0x80000000, 0x80000000);
+	nvkm_mask(device, 0x61c130 + loff, 0x0000000f, mask);
+	nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000);
 	nv_wait(disp, 0x61c034 + soff, 0x80000000, 0x00000000);
 	return 0;
 }
@@ -91,7 +94,8 @@ gm204_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
 		     int ln, int vs, int pe, int pc)
 {
 	struct nv50_disp *disp = (void *)nvkm_disp(outp);
-	struct nvkm_bios *bios = nvkm_bios(disp);
+	struct nvkm_device *device = disp->base.engine.subdev.device;
+	struct nvkm_bios *bios = device->bios;
 	const u32 shift = gm204_sor_dp_lane_map(disp, ln);
 	const u32 loff = gm204_sor_loff(outp);
 	u32 addr, data[4];
@@ -111,16 +115,16 @@ gm204_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
 		return -EINVAL;
 	ocfg.tx_pu &= 0x0f;
 
-	data[0] = nv_rd32(disp, 0x61c118 + loff) & ~(0x000000ff << shift);
-	data[1] = nv_rd32(disp, 0x61c120 + loff) & ~(0x000000ff << shift);
-	data[2] = nv_rd32(disp, 0x61c130 + loff);
+	data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift);
+	data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift);
+	data[2] = nvkm_rd32(device, 0x61c130 + loff);
 	if ((data[2] & 0x00000f00) < (ocfg.tx_pu << 8) || ln == 0)
 		data[2] = (data[2] & ~0x00000f00) | (ocfg.tx_pu << 8);
-	nv_wr32(disp, 0x61c118 + loff, data[0] | (ocfg.dc << shift));
-	nv_wr32(disp, 0x61c120 + loff, data[1] | (ocfg.pe << shift));
-	nv_wr32(disp, 0x61c130 + loff, data[2]);
-	data[3] = nv_rd32(disp, 0x61c13c + loff) & ~(0x000000ff << shift);
-	nv_wr32(disp, 0x61c13c + loff, data[3] | (ocfg.pc << shift));
+	nvkm_wr32(device, 0x61c118 + loff, data[0] | (ocfg.dc << shift));
+	nvkm_wr32(device, 0x61c120 + loff, data[1] | (ocfg.pe << shift));
+	nvkm_wr32(device, 0x61c130 + loff, data[2]);
+	data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift);
+	nvkm_wr32(device, 0x61c13c + loff, data[3] | (ocfg.pc << shift));
 	return 0;
 }