diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2022-06-01 20:47:52 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2022-11-09 10:44:58 +1000 |
| commit | 2541626cfb794e57ba0575a6920826f591f7ced0 (patch) | |
| tree | de53edee6959486a2ce6e8085820680cc14a41ba /drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c | |
| parent | e3f324956a32d08a9361ee1e3beca383f1b01eba (diff) | |
drm/nouveau/acr: use common falcon HS FW code for ACR FWs
Adds context binding and support for FWs with a bootloader to the code
that was added to load VPR scrubber HS binaries, and ports ACR over to
using all of it.
- gv100 split from gp108 to handle FW exit status differences
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c index 0f859f323504..0afc4b2fa529 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c @@ -32,15 +32,13 @@ tu102_sec2_flcn = { .reset_eng = gp102_flcn_reset_eng, .reset_wait_mem_scrubbing = gm200_flcn_reset_wait_mem_scrubbing, .debug = 0x408, - .fbif = 0x600, - .load_imem = nvkm_falcon_v1_load_imem, - .load_dmem = nvkm_falcon_v1_load_dmem, - .read_dmem = nvkm_falcon_v1_read_dmem, + .bind_inst = gm200_flcn_bind_inst, + .bind_stat = gm200_flcn_bind_stat, + .bind_intr = true, + .imem_pio = &gm200_flcn_imem_pio, + .dmem_pio = &gm200_flcn_dmem_pio, .emem_addr = 0x01000000, - .bind_context = gp102_sec2_flcn_bind_context, - .wait_for_halt = nvkm_falcon_v1_wait_for_halt, - .clear_interrupt = nvkm_falcon_v1_clear_interrupt, - .set_start_addr = nvkm_falcon_v1_set_start_addr, + .emem_pio = &gp102_flcn_emem_pio, .start = nvkm_falcon_v1_start, .cmdq = { 0xc00, 0xc04, 8 }, .msgq = { 0xc80, 0xc84, 8 }, |