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authorAlex Deucher <alexander.deucher@amd.com>2013-07-23 09:41:05 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-08-30 16:30:08 -0400
commit22c775ce80ed921fe9490f3cc2ca66dcda44f572 (patch)
tree5c330689c876b94c34857feefdac1b2cbb27cbc3 /drivers/gpu/drm/radeon/radeon_asic.c
parent1fd11777c2f0e6b6b37432b984bf40e3c6072f23 (diff)
drm/radeon: implement clock and power gating for CIK (v3)
Only the APUs support power gating. v2: disable cgcg for now v3: workaround hw issue in mgcg Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 1926ec06a638..880551b6df61 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -2780,6 +2780,7 @@ int radeon_asic_init(struct radeon_device *rdev)
case CHIP_BONAIRE:
rdev->asic = &ci_asic;
rdev->num_crtc = 6;
+ rdev->has_uvd = true;
break;
case CHIP_KAVERI:
case CHIP_KABINI:
@@ -2789,6 +2790,7 @@ int radeon_asic_init(struct radeon_device *rdev)
rdev->num_crtc = 4;
else
rdev->num_crtc = 2;
+ rdev->has_uvd = true;
break;
default:
/* FIXME: not supported yet */