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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-10-15 13:21:36 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-10-15 15:38:20 +0100 |
commit | 36b6b6816989cf6f468eea82694e83211a066fa4 (patch) | |
tree | 470b5e62249ccf24aaff18ca9874a43d6b91b148 /drivers/gpu/drm/sis | |
parent | d46b60a2e8d246f1f0faa38e52f4f5a73858c338 (diff) |
drm/i915: Fix MOCS PTE setting for gen9+
Fix up the MOCS PTE setting to really get the LLC cacheability
from the PTE rather than hardocoding it to LLC or LLC+eLLC.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201007120329.17076-2-ville.syrjala@linux.intel.com
Link: https://patchwork.freedesktop.org/patch/msgid/20201015122138.30161-2-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/sis')
0 files changed, 0 insertions, 0 deletions