diff options
| author | Paul Kocialkowski <paul.kocialkowski@bootlin.com> | 2019-01-18 15:51:19 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-01-18 19:07:45 +0100 |
| commit | 9afe52d54bb0d7ec1fdaf2abb36b39a9938bc5ef (patch) | |
| tree | 6ad71a34734f4ddda538385ee949b9423635a8ed /drivers/gpu/drm/sun4i/sun4i_frontend.c | |
| parent | 34d896ed1b9e0b34dfc054842f05738cf22ecf18 (diff) | |
drm/sun4i: frontend: Add support for semi-planar YUV input formats
Semi-planar YUV formats use two distinct planes, one for luminance and
one for chrominance. To add support for them, we need to configure the
second line stride and buffer address registers to setup the second YUV
plane.
New definitions are introduced to configure the input format register
for the YUV420 and YUV422 semi-planar formats.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190118145133.21281-10-paul.kocialkowski@bootlin.com
Diffstat (limited to 'drivers/gpu/drm/sun4i/sun4i_frontend.c')
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_frontend.c | 50 |
1 files changed, 45 insertions, 5 deletions
diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 1946dd9e58d9..f262069d348f 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -119,11 +119,23 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG, fb->pitches[0]); + if (fb->format->num_planes > 1) + regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD1_REG, + fb->pitches[1]); + /* Set the physical address of the buffer in memory */ paddr = drm_fb_cma_get_gem_addr(fb, state, 0); paddr -= PHYS_OFFSET; - DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); + DRM_DEBUG_DRIVER("Setting buffer #0 address to %pad\n", &paddr); regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr); + + if (fb->format->num_planes > 1) { + paddr = drm_fb_cma_get_gem_addr(fb, state, 1); + paddr -= PHYS_OFFSET; + DRM_DEBUG_DRIVER("Setting buffer #1 address to %pad\n", &paddr); + regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR1_REG, + paddr); + } } EXPORT_SYMBOL(sun4i_frontend_update_buffer); @@ -133,6 +145,8 @@ sun4i_frontend_drm_format_to_input_fmt(const struct drm_format_info *format, { if (!format->is_yuv) *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB; + else if (drm_format_info_is_yuv_sampling_420(format)) + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420; else if (drm_format_info_is_yuv_sampling_422(format)) *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422; else @@ -145,12 +159,18 @@ static int sun4i_frontend_drm_format_to_input_mode(const struct drm_format_info *format, u32 *val) { - if (format->num_planes == 1) + switch (format->num_planes) { + case 1: *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED; - else - return -EINVAL; + return 0; - return 0; + case 2: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR; + return 0; + + default: + return -EINVAL; + } } static int @@ -162,6 +182,22 @@ sun4i_frontend_drm_format_to_input_sequence(const struct drm_format_info *format *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX; return 0; + case DRM_FORMAT_NV12: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UV; + return 0; + + case DRM_FORMAT_NV16: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UV; + return 0; + + case DRM_FORMAT_NV21: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VU; + return 0; + + case DRM_FORMAT_NV61: + *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_VU; + return 0; + case DRM_FORMAT_UYVY: *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UYVY; return 0; @@ -205,6 +241,10 @@ static int sun4i_frontend_drm_format_to_output_fmt(uint32_t fmt, u32 *val) static const uint32_t sun4i_frontend_formats[] = { DRM_FORMAT_BGRX8888, + DRM_FORMAT_NV12, + DRM_FORMAT_NV16, + DRM_FORMAT_NV21, + DRM_FORMAT_NV61, DRM_FORMAT_UYVY, DRM_FORMAT_VYUY, DRM_FORMAT_XRGB8888, |