diff options
| author | Jernej Skrabec <jernej.skrabec@siol.net> | 2018-11-04 19:26:46 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-05 10:34:43 +0100 |
| commit | 4b09c07383132d67e4e297d4eb35dbae596ea74e (patch) | |
| tree | 2c02a70b20f419015573782068cfbc1315252a8b /drivers/gpu/drm/sun4i/sun8i_vi_layer.h | |
| parent | fb3ef54246220ddd0ae3fc26e4c4c44a0001fbd3 (diff) | |
drm/sun4i: Rework DE2 register defines
Most, if not all, registers found in DE2 still exists in DE3. However,
units are on different base addresses.
To prepare for addition of DE3 support, registers macros are reworked so
they take base address as parameter.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
[rebased]
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-10-jernej.skrabec@siol.net
Diffstat (limited to 'drivers/gpu/drm/sun4i/sun8i_vi_layer.h')
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_vi_layer.h | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.h b/drivers/gpu/drm/sun4i/sun8i_vi_layer.h index 6996627a0a76..46f0237c17bb 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.h +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.h @@ -12,17 +12,18 @@ #include <drm/drm_plane.h> -#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x30 * (layer) + 0x0) -#define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x30 * (layer) + 0x4) -#define SUN8I_MIXER_CHAN_VI_LAYER_COORD(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x30 * (layer) + 0x8) -#define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(ch, layer, plane) \ - (0x2000 + 0x1000 * (ch) + 0x30 * (layer) + 0xc + 4 * (plane)) -#define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(ch, layer, plane) \ - (0x2000 + 0x1000 * (ch) + 0x30 * (layer) + 0x18 + 4 * (plane)) -#define SUN8I_MIXER_CHAN_VI_OVL_SIZE(ch) (0x2000 + 0x1000 * (ch) + 0xe8) +#define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, layer) \ + ((base) + 0x30 * (layer) + 0x0) +#define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(base, layer) \ + ((base) + 0x30 * (layer) + 0x4) +#define SUN8I_MIXER_CHAN_VI_LAYER_COORD(base, layer) \ + ((base) + 0x30 * (layer) + 0x8) +#define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \ + ((base) + 0x30 * (layer) + 0xc + 4 * (plane)) +#define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \ + ((base) + 0x30 * (layer) + 0x18 + 4 * (plane)) +#define SUN8I_MIXER_CHAN_VI_OVL_SIZE(base) \ + ((base) + 0xe8) #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN BIT(0) /* RGB mode should be set for RGB formats and cleared for YCbCr */ |