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authorEric Anholt <eric@anholt.net>2018-10-24 11:43:13 -0700
committerEric Anholt <eric@anholt.net>2018-10-30 16:23:38 -0700
commit03ceb1c8dfd1e293f40696bfe4e61c78820a0867 (patch)
tree00baf0dda2f40239e5ccaa845a79e2237b5b33ea /drivers/gpu/drm/tinydrm
parentf300c86e33a686c7abcf0c37deee04ef666ed78b (diff)
drm/tinydrm: Fix setting of the column/page end addresses.
If the clipped dirty region's x/y happened to align to 256, we would have set the top 8 bits wrong. Noticed by inspection, not by reproducing a bug. Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20181024184313.2967-4-eric@anholt.net Reviewed-by: Noralf Trønnes <noralf@tronnes.org>
Diffstat (limited to 'drivers/gpu/drm/tinydrm')
-rw-r--r--drivers/gpu/drm/tinydrm/mipi-dbi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/tinydrm/mipi-dbi.c b/drivers/gpu/drm/tinydrm/mipi-dbi.c
index cb3441e51d5f..1bb870021f6e 100644
--- a/drivers/gpu/drm/tinydrm/mipi-dbi.c
+++ b/drivers/gpu/drm/tinydrm/mipi-dbi.c
@@ -240,10 +240,10 @@ static int mipi_dbi_fb_dirty(struct drm_framebuffer *fb,
mipi_dbi_command(mipi, MIPI_DCS_SET_COLUMN_ADDRESS,
(clip.x1 >> 8) & 0xFF, clip.x1 & 0xFF,
- (clip.x2 >> 8) & 0xFF, (clip.x2 - 1) & 0xFF);
+ ((clip.x2 - 1) >> 8) & 0xFF, (clip.x2 - 1) & 0xFF);
mipi_dbi_command(mipi, MIPI_DCS_SET_PAGE_ADDRESS,
(clip.y1 >> 8) & 0xFF, clip.y1 & 0xFF,
- (clip.y2 >> 8) & 0xFF, (clip.y2 - 1) & 0xFF);
+ ((clip.y2 - 1) >> 8) & 0xFF, (clip.y2 - 1) & 0xFF);
ret = mipi_dbi_command_buf(mipi, MIPI_DCS_WRITE_MEMORY_START, tr,
(clip.x2 - clip.x1) * (clip.y2 - clip.y1) * 2);