diff options
author | Ashutosh Dixit <ashutosh.dixit@intel.com> | 2024-06-17 18:46:03 -0700 |
---|---|---|
committer | Ashutosh Dixit <ashutosh.dixit@intel.com> | 2024-06-18 12:40:39 -0700 |
commit | 14e077f8006df9d2d7adf380f0c80e16d6a0a548 (patch) | |
tree | 72d8e394f3a7081374e6ef58aef716d1d5b4867f /drivers/gpu/drm/xe/regs | |
parent | 2f4a730fcd2d6ae7378a67fe78797b0a3f7ca1b3 (diff) |
drm/xe/oa: Add OAC support
Similar to OAR, allow userspace to execute MI_REPORT_PERF_COUNT on compute
engines of a specified exec queue.
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618014609.3233427-12-ashutosh.dixit@intel.com
Diffstat (limited to 'drivers/gpu/drm/xe/regs')
-rw-r--r-- | drivers/gpu/drm/xe/regs/xe_engine_regs.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/xe/regs/xe_oa_regs.h | 3 |
2 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h index cdc68d373165..c38db2a74614 100644 --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h @@ -130,6 +130,7 @@ #define RING_CONTEXT_CONTROL(base) XE_REG((base) + 0x244, XE_REG_OPTION_MASKED) #define CTX_CTRL_OAC_CONTEXT_ENABLE REG_BIT(8) +#define CTX_CTRL_RUN_ALONE REG_BIT(7) #define CTX_CTRL_INDIRECT_RING_STATE_ENABLE REG_BIT(4) #define CTX_CTRL_INHIBIT_SYN_CTX_SWITCH REG_BIT(3) #define CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT REG_BIT(0) diff --git a/drivers/gpu/drm/xe/regs/xe_oa_regs.h b/drivers/gpu/drm/xe/regs/xe_oa_regs.h index 99bad563d51d..2c9e1214e2af 100644 --- a/drivers/gpu/drm/xe/regs/xe_oa_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_oa_regs.h @@ -69,6 +69,9 @@ #define OASTATUS_COUNTER_OVERFLOW REG_BIT(2) #define OASTATUS_BUFFER_OVERFLOW REG_BIT(1) #define OASTATUS_REPORT_LOST REG_BIT(0) +/* OAC unit */ +#define OAC_OACONTROL XE_REG(0x15114) + /* OAM unit */ #define OAM_HEAD_POINTER_OFFSET (0x1a0) #define OAM_TAIL_POINTER_OFFSET (0x1a4) |