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| author | Matthew Brost <matthew.brost@intel.com> | 2024-11-13 18:25:20 -0800 |
|---|---|---|
| committer | Matthew Brost <matthew.brost@intel.com> | 2024-11-14 06:38:45 -0800 |
| commit | 990c29c2dd22e46395831bcff7b06a6ca9ee0573 (patch) | |
| tree | 90f557ef8aebde25ce2abac8e253b559fe4078f2 /drivers/gpu/drm/xe/xe_hw_engine.c | |
| parent | f62e6edfc11d30d07ce48d783da149dda4f7e78f (diff) | |
drm/xe: Improve schedule disable response failure
Print Guc ID and take devcoredump on schedule disable response failure.
GuC ID is useful information and a schedule disable response failure is
possible the LRC state is corrupted so a devcoredump is helpful to debug.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241114022522.1951351-6-matthew.brost@intel.com
Diffstat (limited to 'drivers/gpu/drm/xe/xe_hw_engine.c')
0 files changed, 0 insertions, 0 deletions