diff options
| author | Matt Roper <matthew.d.roper@intel.com> | 2023-06-01 14:52:16 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-19 18:34:11 -0500 |
| commit | f79ee3013ad57021f4557cd3aa964a14b5c94bd4 (patch) | |
| tree | 63bdc71803b05d47c8bed874e41ae0f67dc25bcd /drivers/gpu/drm/xe/xe_mocs.c | |
| parent | a5edc7cdb3875115d1798f4d2057569cf257e7d2 (diff) | |
drm/xe: Add backpointer from gt to tile
Rather than a backpointer to the xe_device, a GT should have a
backpointer to its tile (which can then be used to lookup the device if
necessary).
The gt_to_xe() helper macro (which moves from xe_gt.h to xe_gt_types.h)
can and should still be used to jump directly from an xe_gt to
xe_device.
v2:
- Fix kunit test build
- Move a couple changes to the previous patch. (Lucas)
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230601215244.678611-4-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_mocs.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_mocs.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c index c7a9e733ef3b..86277ecb749b 100644 --- a/drivers/gpu/drm/xe/xe_mocs.c +++ b/drivers/gpu/drm/xe/xe_mocs.c @@ -472,7 +472,7 @@ static void __init_mocs_table(struct xe_gt *gt, unsigned int i; u32 mocs; - mocs_dbg(>->xe->drm, "entries:%d\n", info->n_entries); + mocs_dbg(>_to_xe(gt)->drm, "entries:%d\n", info->n_entries); drm_WARN_ONCE(&xe->drm, !info->unused_entries_index, "Unused entries index should have been defined\n"); for (i = 0; @@ -480,7 +480,7 @@ static void __init_mocs_table(struct xe_gt *gt, i++) { struct xe_reg reg = XE_REG(addr + i * 4); - mocs_dbg(>->xe->drm, "%d 0x%x 0x%x\n", i, reg.addr, mocs); + mocs_dbg(>_to_xe(gt)->drm, "%d 0x%x 0x%x\n", i, reg.addr, mocs); xe_mmio_write32(gt, reg, mocs); } } @@ -509,13 +509,13 @@ static void init_l3cc_table(struct xe_gt *gt, unsigned int i; u32 l3cc; - mocs_dbg(>->xe->drm, "entries:%d\n", info->n_entries); + mocs_dbg(>_to_xe(gt)->drm, "entries:%d\n", info->n_entries); for (i = 0; i < (info->n_entries + 1) / 2 ? (l3cc = l3cc_combine(get_entry_l3cc(info, 2 * i), get_entry_l3cc(info, 2 * i + 1))), 1 : 0; i++) { - mocs_dbg(>->xe->drm, "%d 0x%x 0x%x\n", i, LNCFCMOCS(i).addr, + mocs_dbg(>_to_xe(gt)->drm, "%d 0x%x 0x%x\n", i, LNCFCMOCS(i).addr, l3cc); xe_mmio_write32(gt, LNCFCMOCS(i), l3cc); } @@ -525,7 +525,7 @@ void xe_mocs_init_early(struct xe_gt *gt) { struct xe_mocs_info table; - get_mocs_settings(gt->xe, &table); + get_mocs_settings(gt_to_xe(gt), &table); gt->mocs.uc_index = table.uc_index; gt->mocs.wb_index = table.wb_index; } @@ -538,8 +538,8 @@ void xe_mocs_init(struct xe_gt *gt) /* * LLC and eDRAM control values are not applicable to dgfx */ - flags = get_mocs_settings(gt->xe, &table); - mocs_dbg(>->xe->drm, "flag:0x%x\n", flags); + flags = get_mocs_settings(gt_to_xe(gt), &table); + mocs_dbg(>_to_xe(gt)->drm, "flag:0x%x\n", flags); if (flags & HAS_GLOBAL_MOCS) __init_mocs_table(gt, &table, GLOBAL_MOCS(0).addr); |