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authorNirmoy Das <nirmoy.das@intel.com>2024-06-28 10:58:45 +0200
committerNirmoy Das <nirmoy.das@intel.com>2024-07-01 17:38:48 +0200
commiteb523ec38269889cef15494635a2bc4b608602a3 (patch)
tree31772d90c9ae16cabdec3a1a039b01c445546ee5 /drivers/gpu/drm/xe/xe_pci_sriov.h
parent4f82ac6102788112e599a6074d2c1f2afce923df (diff)
drm/xe/guc: Configure TLB timeout based on CT buffer size
GuC TLB invalidation depends on GuC to process the request from the CT queue and then the real time to invalidate TLB. Add a function to return overestimated possible time a TLB inval H2G might take which can be used as timeout value for TLB invalidation wait time. v4: Make sure CTB is in 4K blocks(Michal) and other doc fixes v3: Pass CT to xe_guc_ct_queue_proc_time_jiffies() (Michal) Add tlb_timeout_jiffies() that replaces TLB_TIMEOUT(Michal) v2: Address reviews from Michal. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1622 Cc: Matthew Brost <matthew.brost@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Acked-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240628085845.2369-1-nirmoy.das@intel.com Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_pci_sriov.h')
0 files changed, 0 insertions, 0 deletions