diff options
| author | Lukas Bulwahn <lukas.bulwahn@gmail.com> | 2021-08-19 13:22:52 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2021-08-26 11:19:08 +0200 |
| commit | 47ddb72f789333a8ccb792b0fd6d6fe8a7906694 (patch) | |
| tree | ce3e8dbc4fdf8c9266bcc0ec954ac10c47200f8d /drivers/gpu/drm/zte/zx_tvenc_regs.h | |
| parent | 5e12f7ea4aa04d1ffbb08c899845efd74c173aaa (diff) | |
drm: zte: remove obsolete DRM Support for ZTE SoCs
Commit 89d4f98ae90d ("ARM: remove zte zx platform") removes the config
ARCH_ZX. So, since then, the DRM Support for ZTE SoCs (config DRM_ZTE)
depends on this removed config ARCH_ZX and cannot be selected.
Fortunately, ./scripts/checkkconfigsymbols.py detects this and warns:
ARCH_ZX
Referencing files: drivers/gpu/drm/zte/Kconfig
So, remove this obsolete DRM support.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20210819112253.16484-5-lukas.bulwahn@gmail.com
Diffstat (limited to 'drivers/gpu/drm/zte/zx_tvenc_regs.h')
| -rw-r--r-- | drivers/gpu/drm/zte/zx_tvenc_regs.h | 27 |
1 files changed, 0 insertions, 27 deletions
diff --git a/drivers/gpu/drm/zte/zx_tvenc_regs.h b/drivers/gpu/drm/zte/zx_tvenc_regs.h deleted file mode 100644 index 40f033109374..000000000000 --- a/drivers/gpu/drm/zte/zx_tvenc_regs.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright 2017 Linaro Ltd. - * Copyright 2017 ZTE Corporation. - */ - -#ifndef __ZX_TVENC_REGS_H__ -#define __ZX_TVENC_REGS_H__ - -#define VENC_VIDEO_INFO 0x04 -#define VENC_VIDEO_RES 0x08 -#define VENC_FIELD1_PARAM 0x10 -#define VENC_FIELD2_PARAM 0x14 -#define VENC_LINE_O_1 0x18 -#define VENC_LINE_E_1 0x1c -#define VENC_LINE_O_2 0x20 -#define VENC_LINE_E_2 0x24 -#define VENC_LINE_TIMING_PARAM 0x28 -#define VENC_WEIGHT_VALUE 0x2c -#define VENC_BLANK_BLACK_LEVEL 0x30 -#define VENC_BURST_LEVEL 0x34 -#define VENC_CONTROL_PARAM 0x3c -#define VENC_SUB_CARRIER_PHASE1 0x40 -#define VENC_PHASE_LINE_INCR_CVBS 0x48 -#define VENC_ENABLE 0xa8 - -#endif /* __ZX_TVENC_REGS_H__ */ |