diff options
| author | Charlene Liu <charlene.liu@amd.com> | 2019-06-03 10:53:44 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 09:34:13 -0500 |
| commit | f82c916c41974c4e786c7311c34c33ca67373092 (patch) | |
| tree | c1ea288ea65f79f89b81a0dcdd9e7f1852ec3e09 /drivers/gpu/drm | |
| parent | 39a4eb853f9ac85e9b042874ef5fa12c8e20e440 (diff) | |
drm/amd/display: add some parameters to validate bandwidth functions
required for new checks.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
6 files changed, 23 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index 7ce8d62ce5ae..a06429ca0019 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -574,6 +574,14 @@ struct dc_info_packet { uint8_t sb[32]; }; +struct dc_info_packet_128 { + bool valid; + uint8_t hb0; + uint8_t hb1; + uint8_t hb2; + uint8_t hb3; + uint8_t sb[128]; +}; #define DC_PLANE_UPDATE_TIMES_MAX 10 struct dc_plane_flip_time { diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c index d71a0dcf652a..310687ec166e 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c @@ -2364,7 +2364,8 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, pipe_cnt, pipe_idx, cstate_en, - context->bw_ctx.bw.dcn.clk.p_state_change_support); + context->bw_ctx.bw.dcn.clk.p_state_change_support, + false, false, false); context->bw_ctx.dml.funcs.rq_dlg_get_rq_reg(&context->bw_ctx.dml, &context->res_ctx.pipe_ctx[i].rq_regs, diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c index 130b01801a26..791aa745efd2 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c @@ -204,14 +204,7 @@ static void enc2_stream_encoder_stop_hdmi_info_packets( } #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT -struct dc_info_packet_128 { - bool valid; - uint8_t hb0; - uint8_t hb1; - uint8_t hb2; - uint8_t hb3; - uint8_t sb[128]; -}; + /* Update GSP7 SDP 128 byte long */ static void enc2_send_gsp7_128_info_packet( diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c index ec518ab0f694..878bf4782ce6 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c @@ -1567,7 +1567,10 @@ void dml20_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, const unsigned int num_pipes, const unsigned int pipe_idx, const bool cstate_en, - const bool pstate_en) + const bool pstate_en, + const bool vm_en, + const bool ignore_viewport_pos, + const bool immediate_flip_support) { display_rq_params_st rq_param = {0}; display_dlg_sys_params_st dlg_sys_param = {0}; diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h index ebb26105cf59..8c86b63ddf07 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h @@ -66,6 +66,9 @@ void dml20_rq_dlg_get_dlg_reg( const unsigned int num_pipes, const unsigned int pipe_idx, const bool cstate_en, - const bool pstate_en); + const bool pstate_en, + const bool vm_en, + const bool ignore_viewport_pos, + const bool immediate_flip_support); #endif diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h index 61541c431110..5bf13d67f289 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h @@ -50,7 +50,10 @@ struct dml_funcs { const unsigned int num_pipes, const unsigned int pipe_idx, const bool cstate_en, - const bool pstate_en); + const bool pstate_en, + const bool vm_en, + const bool ignore_viewport_pos, + const bool immediate_flip_support); void (*rq_dlg_get_rq_reg)( struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, |