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authorThierry Reding <treding@nvidia.com>2015-04-08 17:17:44 +0200
committerThierry Reding <treding@nvidia.com>2015-08-13 13:47:17 +0200
commit2ed264bf916b689fe0c71ac726995f0876062667 (patch)
tree897514256cff6c3caa449675fb4098f25de69fd4 /drivers/gpu/host1x
parent8ed5c0623272663783e052123fea02651464a0a5 (diff)
gpu: host1x: mipi: Clear calibration status
Before starting a new calibration cycle, make sure to clear the current status by writing a 1 to the various "calibration done" bits. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/host1x')
-rw-r--r--drivers/gpu/host1x/mipi.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/host1x/mipi.c b/drivers/gpu/host1x/mipi.c
index a264b339ae09..7253048ce131 100644
--- a/drivers/gpu/host1x/mipi.c
+++ b/drivers/gpu/host1x/mipi.c
@@ -279,6 +279,10 @@ int tegra_mipi_calibrate(struct tegra_mipi_device *device)
tegra_mipi_writel(device->mipi, value, MIPI_CAL_CTRL);
+ /* clear any pending status bits */
+ value = tegra_mipi_readl(device->mipi, MIPI_CAL_STATUS);
+ tegra_mipi_writel(device->mipi, value, MIPI_CAL_STATUS);
+
value = tegra_mipi_readl(device->mipi, MIPI_CAL_CTRL);
value |= MIPI_CAL_CTRL_START;
tegra_mipi_writel(device->mipi, value, MIPI_CAL_CTRL);