diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2024-05-15 14:56:48 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2024-05-16 11:23:00 +0300 |
| commit | 11abdbc22b1ad8fd0d41ca0742c79a153b2ade97 (patch) | |
| tree | 421034fc66ebe4b1b582d1819c23d25eb63e3437 /drivers/gpu | |
| parent | 79a0bcadb4ca1bd9af126faecf22999bef859b2d (diff) | |
drm/i915: pass dev_priv explicitly to CURSURFLIVE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURSURFLIVE register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/86aa98ad9f883681f5c2e3aba839d02d8591bfbf.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_cursor_regs.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr.c | 13 |
2 files changed, 10 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h b/drivers/gpu/drm/i915/display/intel_cursor_regs.h index 3e948526e9ab..c2190af1e9f5 100644 --- a/drivers/gpu/drm/i915/display/intel_cursor_regs.h +++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h @@ -73,7 +73,7 @@ #define CURSIZE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE) #define CUR_FBC_CTL(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_FBC_CTL_A) #define CUR_CHICKEN(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_CHICKEN_A) -#define CURSURFLIVE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASURFLIVE) +#define CURSURFLIVE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASURFLIVE) /* skl+ */ #define _CUR_WM_A_0 0x70140 diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 98dfd537070c..df0d14a5023f 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2352,7 +2352,7 @@ static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp) * but testing proved that it works for up display 13, for newer * than that testing will be needed. */ - intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0); + intel_de_write(dev_priv, CURSURFLIVE(dev_priv, intel_dp->psr.pipe), 0); } void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state) @@ -3100,7 +3100,9 @@ static void _psr_invalidate_handle(struct intel_dp *intel_dp) if (intel_dp->psr.psr2_sel_fetch_cff_enabled) { /* Send one update otherwise lag is observed in screen */ - intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0); + intel_de_write(dev_priv, + CURSURFLIVE(dev_priv, intel_dp->psr.pipe), + 0); return; } @@ -3110,7 +3112,8 @@ static void _psr_invalidate_handle(struct intel_dp *intel_dp) intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(dev_priv, cpu_transcoder), val); - intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0); + intel_de_write(dev_priv, + CURSURFLIVE(dev_priv, intel_dp->psr.pipe), 0); intel_dp->psr.psr2_sel_fetch_cff_enabled = true; } else { intel_psr_exit(intel_dp); @@ -3210,7 +3213,9 @@ static void _psr_flush_handle(struct intel_dp *intel_dp) intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(dev_priv, cpu_transcoder), val); - intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0); + intel_de_write(dev_priv, + CURSURFLIVE(dev_priv, intel_dp->psr.pipe), + 0); intel_dp->psr.psr2_sel_fetch_cff_enabled = false; } } else { |