diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2024-03-19 11:12:53 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2024-03-21 08:44:36 +0200 |
| commit | 4c8d5562a07179f944b28b57c10e133f25dae7cf (patch) | |
| tree | e895c786ce9352da152cda9adf115007e55633b8 /drivers/gpu | |
| parent | 0a31ed64cc91ce0bdd7b34f45e62bf97776b7249 (diff) | |
drm/i915/mst: enable MST mode for 128b/132b single-stream sideband
If the sink supports 128b/132b and single-stream sideband messaging,
enable MST mode.
With this, the topology manager will still write DP_MSTM_CTRL, which
should be ignored by the sink. In the future, the topology manager
should probably only set the sideband messaging related parts of the
register.
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/39d753e53cd662c3fd3776b6167bf792219fd950.1710839496.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 24f7c2a9b707..3d09cd65664d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4061,7 +4061,8 @@ intel_dp_mst_mode_choose(struct intel_dp *intel_dp, if (!intel_dp_mst_source_support(intel_dp)) return DRM_DP_SST; - if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG) + if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG && + !(intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B)) return DRM_DP_SST; return sink_mst_mode; |