diff options
author | Jani Nikula <jani.nikula@intel.com> | 2023-01-18 15:15:35 +0200 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2023-01-20 10:14:25 +0200 |
commit | fff6172798cdc83ec1a17b4816b752172f86b51f (patch) | |
tree | fe3790f3f8b46c2a3ee3bd88c7108248e4f36165 /drivers/gpu | |
parent | 0d885242f335a6332a173f1884b20f90e3f71f33 (diff) |
drm/i915: move a few HAS_ macros closer to their place
There's not that much organization with where the various HAS_FEATURE()
macros are placed, but at least try to group them closer together.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Nirmoy Das <nirmoy.das@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230118131538.3558599-4-jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a8696c3cf29a..60661d89f350 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -186,8 +186,6 @@ struct i915_gem_mm { u32 shrink_count; }; -#define HAS_HW_SAGV_WM(i915) (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915)) - struct i915_virtual_gpu { struct mutex lock; /* serialises sending of g2v_notify command pkts */ bool active; @@ -441,9 +439,6 @@ static inline struct intel_gt *to_gt(struct drm_i915_private *i915) #define INTEL_REVID(dev_priv) (to_pci_dev((dev_priv)->drm.dev)->revision) -#define HAS_DSB(dev_priv) (INTEL_INFO(dev_priv)->display.has_dsb) -#define HAS_DSC(__i915) (RUNTIME_INFO(__i915)->has_dsc) - #define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.display_step) #define INTEL_GRAPHICS_STEP(__i915) (RUNTIME_INFO(__i915)->step.graphics_step) #define INTEL_MEDIA_STEP(__i915) (RUNTIME_INFO(__i915)->step.media_step) @@ -855,6 +850,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define HAS_RPS(dev_priv) (INTEL_INFO(dev_priv)->has_rps) #define HAS_DMC(dev_priv) (RUNTIME_INFO(dev_priv)->has_dmc) +#define HAS_DSB(dev_priv) (INTEL_INFO(dev_priv)->display.has_dsb) +#define HAS_DSC(__i915) (RUNTIME_INFO(__i915)->has_dsc) +#define HAS_HW_SAGV_WM(i915) (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915)) #define HAS_HECI_PXP(dev_priv) \ (INTEL_INFO(dev_priv)->has_heci_pxp) |